Engineering for a typical electronic product involves printed circuit board design and manufacture. Connectors to the circuit board are individually created to accommodate interfacing to other circuit boards and signals. Often, the pins of a connector are identified by corresponding pin numbers. These printed circuit boards are verified by engineers to ensure geometry, orientation and pin number association: the geometry and orientation verifications involve the physical attributes of the circuit board and parts; the pin number verification involves manual tracing of signal pathways through the pins of the connectors and through the underlying circuit boards.
Since signal names often vary from circuit board to circuit board, and since the connections to any given board may be highly dense and complex, the verifications involving signal and pin assignments has become increasingly difficult. Errors in pin assignment, or in signal associations to pins, are easily missed in schematic reviews, particularly with the larger and larger connectors utilized with printed circuit boards. In the development of large systems of the type that include many boards, one of the most common problems involves the misconnection of signals between boards.
It is, accordingly, one object of the invention to provide methods for mapping pin assignments within printed circuit board design architectures. Other objects of the invention are apparent within the description that follows.